Provides a test procedure for determining the ability of semiconductor devices and components and/or board assemblies to withstand mechanical stresses induced by alternating high and low temperature extremes. Permanent changes in electrical and/or physical characteristics can result from these mechanical stresses. Applies to single, dual and triple chamber temperature cycling and covers component and solder interconnection testing.
Product Details
Edition: 1.0 Published: 07/11/2003 Number of Pages: 25File Size: 1 file , 650 KB